ASIC & FPGA Developer - Sr

Do you want to work with the latest technologies and highly skilled colleagues, at a world leading company? Then you might be the one we are looking for to join us at Technologies, one of the departments within Axis R&D, with responsibility for developing Axis product platforms that are the base for all Axis Video Surveillance Products. Who is your future team? You will join the Common Core Platform team, part of the Product Platforms department within Axis R&D's Technologies organization.The organization consists of several highly skilled and motivated R&D teams, with a strong presence in Lund and since a couple of months an established kernel-focused team in Stockholm. Our teams value personal growth, collaboration, and teamwork. If you're someone who enjoys making an impact and contributing to positive change, you'll feel right at home with us. The Common Core Platform team in Stockholm is a small but growing team that will play an important role in developing and configuring software for Axis' new technology platforms based on our in-house engineered ARTPEC system-on-chips, used in the next generations of video surveillance products. The team currently consists of three engineers and is in an active growth phase, with a clear ambition to take increased technical responsibility over time. The platforms we develop are Linux-based, and development as well as validation takes place in a Linux environment. The work spans requirements, design, implementation, and validation of core platform areas such as the boot process, security, and CPU subsystem. The Stockholm team works in close collaboration with the larger and more established Product Platforms teams in Lund, as well as with the ASIC team located in Stockholm, forming a tightly integrated distributed team. What you'll do here as Senior Linux Kernel Engineer? In your daily work, you will typically engage in the following activities: Collaborate with ASIC design engineers to research and develop solutions for Axis´ ASIC and product platforms, in particular the SW aspects Participate in design reviews, technical discussions and specifications to ensure the quality and feasibility of solutions Design, implement or utilize test environments needed to validate and/or optimize our solution designs Prepare SW for and participate in bring-up and validation of our SoCs. This includes debugging issues and implementing solutions Evaluation of hardware blocks, platforms and related documentation (mainly from a SW perspective, Linux kernel in particular) Interact with internal and external teams (e.g. customers, partners or suppliers) Participate in development and maintenance of existing Linux kernel platforms (e.g. previously developed platforms and products) In this role, you will (together with skilled colleagues) mainly be working in the following areas: IP evaluation and selection (primary responsibility) All kind of engineering activities related to Linux kernel development (e.g. driver development, kernel configuration, upstream activities, provide domain expertise to other teams, etc) Who are we looking for/Who are you? You are an analytic and dedicated person with a strong personal drive and an ability to work both unsupervised and as a part of a team. You have the ability to think ahead and understand and manage consequences of complex decisions or findings. You are good at collaborating with people with different backgrounds (e.g. ASIC engineers, other SW teams, external partners and managers) and have a strong attention to detail. Required qualifications: A master's degree in computer science, physics, mathematics, electrical engineering or similar Background in Linux kernel development Experience in embedded C development and debugging, particularly close to hardware Familiarity with version control systems and code review tools (Git and Gerrit) Additional valuable qualifications: Experience in working with Linux kernel upstream Background including SoC design work from a SW perspective ASIC IP configuration experience A good understanding of the boot process of embedded devices Basic understanding of ASIC design Experience from using QEMU as a tool to make a system simulation environment Experience with Python and Rust development The position is office-based and you will be located in Axis office in Stockholm, Sweden. What Axis have to offer Here, you'll contribute to meaningful projects that shape the future of security and surveillance - developing solutions used worldwide. This is a unique opportunity to be part of building our new R&D office in central Stockholm. You'll enjoy the advantages of working at a small, agile site while also being part of a successful organization that is already the world leader in network video. Ready to Act? Vacation is important! At Axis we value work-life balance and that means that during summer many of us are on a well-deserved vacation. During this period of time, you can expect some delay in our response, but we will get back to you as soon as possible! In case of questions, please reach out to recruiting manager Erik Thored, Engineering Manager for the Common Core Platform team, at +46 46 272 1800.

MEET ARAGO AND THE ARAGONIANS Arago is an AI and computer hardware company whose mission is to drive the course of history forward. We do so by accelerating breakthroughs at the intersection of AI and semiconductors. Founded in 2024 by AI researchers and physicists with deep expertise in photonics, electronics, software, mathematics, and machine learning, Arago brings together a lean team of engineers and scientists from the world’s top companies and research labs. Composed of nine nationalities and operating from hubs in France, North America, and Israel, we believe in great science and fast achievements. Our work is guided by these core principles: 1. Do great things: we deliver work we’re proud to sign our name to. 2. High velocity: speed matters. We move quickly, one step at a time. 3. One unit: we’re all in this together, with relationships grounded in trust, respect, and camaraderie. Arago is backed by executives from Apple, Arm, Nvidia, Microsoft, and Hugging Face, as well as prominent US and European deeptech venture firms and exited founders. WHAT YOU’LL DO Design and verify custom digital hardware components and architectures that enable high-performance, tightly integrated computation workloads and interface Arago’s custom tensor unit for advanced AI/ML applications. RESPONSIBILITIES * Design, implement, and verify RTL blocks for memory, control, and compute subsystems within Arago’s custom multiphysics computation unit. * Collaborate with Arago’s system software and architecture teams to define block-level specifications and ensure alignment with performance and integration goals. * Develop and maintain functional verification infrastructure to validate design correctness across simulation and hardware testbenches. * Support synthesis, timing analysis, and backend integration, working closely with Arago’s physical design and CAD engineers. * Contribute to architectural exploration and hardware-software co-design efforts to shape future iterations of Arago’s compute platform. REQUIRED SKILLS AND EXPERIENCE * Extensive experience in RTL design (Verilog/SystemVerilog) for control logic, datapaths, memory subsystems, and specialized processing units. * Strong understanding of digital architecture, including pipelining, arbitration, memory hierarchy, and system-level integration. * Proficiency in functional verification, including testbench development, assertions, coverage metrics, and debugging (UVM experience is a plus). * Familiarity with ASIC and FPGA design flows, including synthesis, timing closure, and DFT. * Comfortable working across the full hardware stack — from architectural specification and microarchitecture to physical implementation support. * Language: English at a proficient level. French is a plus. PAY AND BENEFITS * Competitive cash compensation, with final package based on location, experience, and the pay of team members in similar positions. * Meaningful stock option plan offered at the earliest stage of the company (included in the majority of full time offers). * Relocation bonus and coverage of moving expenses for relocation within 20 minutes of the company’s location. * Healthcare coverage (including family-friendly options), pension contributions, professional development support, and 25 days of PTO, in addition to public holidays. * Ownership of a key technical domain, with significant vertical and/or horizontal growth opportunities, based on performance and individual drive. * Reimbursement of 50% of the public transport subscription fee. * A high-paced, multicultural (with 9 nationalities), and engineering-led environment. OUR HIRING PROCESS: YOUR JOURNEY TO ARAGO * Screening Call : Get to know you beyond your CV. * Technical meeting : Deep dive into your past projects and technical achievements. * CEO Interview : Assess the fit with the team’s culture and long-term vision. * Reference Calls: Mandatory calls with your former managers to validate strengths, weaknesses, and work style. * Technical Assessment: Take-home technical assignment crafted to the role you’re applying for. * Final Interview : Discuss your technical assignment and address any remaining questions with team members.