
Graphcore · Bristol
About Graphcore At Graphcore, we’re building the future of AI compute.We’re a team of semiconductor, software and AI experts, with deep experience in creating ...
About Graphcore
At Graphcore, we’re building the future of AI compute.We’re a team of semiconductor, software and AI experts, with deep experience
in creating the complete AI compute stack - from silicon and software to infrastructure at datacenter scale.As part of the
SoftBank Group, backed by significant long-term investment, we are delivering key technology into the fast-growing SoftBank AI
ecosystem.To meet the vast and exciting AI opportunity, Graphcore is expanding its teams around the world.We are bringing together
the brightest minds to solve the toughest problems, in a place where everyone has the opportunity to make an impact on the
company, our products and the future of artificial intelligence.
Job Summary
Our team is at the forefront of the artificial intelligence revolution, enabling innovators from all industries and sectors to
expand human potential with technology. The availability of specialised artificial intelligence compute will be a decisive factor
in AI’s rate of progress. Graphcore allows innovators to go further, faster. What we do really makes a difference. Reporting to
the Director of Silicon Architecture, the SoC Architects are responsible for the design, specification, modelling and
integration of sub-systems within complex, high performance and highly integrated silicon devices at the forefront of AI
acceleration technology. The role involves close collaboration with other groups, including architecture, silicon
design, verification, hardware and software teams.
The Team
The Silicon Architecture Team sits within the COO group. The SoC architects are responsible for the architectural
specification, integration, modelling, validation and evaluation of numerous critical sub-systems, including high-speed
interfaces for our upcoming AI acceleration platforms.
Responsibilities and Duties
ensure implementation correctness
Candidate Profile
Desirable
Benefits
In addition to a competitive salary, annual leave policy, medical and dental health plans, a gym card and employee pension
(matched up to 4%). We review our benefits on a yearly basis to ensure we offer a valuable and rewarding benefits programme to our
employees. We welcome people of different backgrounds and experiences; we’re committed to building an inclusive work environment
that makes Graphcore a great home for everyone. We offer an equal opportunity process and understand that there are visible and
invisible differences in all of us. We can provide a flexible approach to interview and encourage you to chat to us if you require
any reasonable adjustments.
Graphcore Senior Principal AI SoC Validation (Bring-up lead) Graphcore is a globally recognised leader in Artificial Intelligence computing systems. The company designs advanced semiconductors and data centre hardware that provide the specialised processing power needed to drive AI innovation, while delivering the efficiency required to support its broader adoption. As part of the SoftBank Group, Graphcore is a member of an elite family of companies responsible for some of the world’s most transformative technologies. We are opening a new AI Engineering Campus in Bengaluru which will play a central role in Graphcore's work building the future of AI computing. We are developing the next generation of AI compute, a large-scale system-on-chip (SoC) designed to power future high-performance AI systems. As the SoC Validation Lead, you will be responsible for enabling pre-production software to run reliably on new silicon quickly and efficiently, before showing that the silicon meets the highest standards of quality, reliability and functionality, ready for production deployment. You will lead a team delivering post-silicon validation across the full AI SoC, working across silicon, firmware, and platform levels. The role requires a deep technical understanding, strong hands-on debug experience, and the ability to collaborate effectively with hardware, software, and systems engineering teams. Key responsibilities * Define and lead post-silicon validation strategy Develop and refine the overall post-silicon validation approach for our AI SoCs, ensuring reliable and timely delivery of validated silicon, architectural correctness, feature robustness, and at-scale system reliability. * Drive cross-domain debug and issue resolution Lead investigation and resolution of complex issues spanning silicon, firmware, operating systems, and platform interactions. Ensure that fixes are effective and sustainable. * Promote collaboration and shared understanding Work closely with design, software, and validation teams to align on quality objectives and debug priorities. Use data-driven insights and clear communication to maintain focus and alignment across teams. * Advance automation and scalable validation Encourage the use of emulation, prototyping, and large-scale validation infrastructure to improve coverage and reduce time to debug. * Support continuous improvement Foster a culture that values learning, transparency, and improvement in validation methods, automation, and analysis. * Engage with leadership and customers Provide clear and concise updates on validation progress, risks, and quality indicators to executive teams and key partners. Contribute to product readiness assessments and roadmap decisions. About you * A systems thinker comfortable working across hardware, software, and integration boundaries. * A collaborative leader who builds trust and alignment across diverse teams. * Skilled in technical problem solving and debugging complex post-silicon issues. * A clear communicator who can simplify complexity and support sound decision-making in fast-paced environments. * Committed to developing people and promoting an inclusive, high-performing team culture. Qualifications * Bachelor’s degree in Electronic Engineering or equivalent; Master’s preferred. * 15 - 20 years in silicon, system, or platform validation, including 5-10 years in technical leadership. * Proven experience leading post-silicon validation and bring-up for complex SoCs (AI, GPU, or CPU). * Strong understanding of SoC architecture, coherency protocols, power management, and interconnects. * Expertise in debug tools, DFT infrastructure, and validation automation frameworks. * Proficient in C/C++, Python, and Linux-based environments; experience with large-scale validation clusters is an advantage. * Excellent communication, collaboration, and stakeholder management skills. Why Join Us This is an opportunity to play a central role in developing an advanced AI compute platform that pushes the boundaries of performance and efficiency. You will be part of a highly skilled and motivated team, working on technology that will have a significant impact across future AI systems.
Graphcore is a globally recognized leader in Artificial Intelligence computing systems. The company designs advanced semiconductors and data center hardware that provide the specialized processing power needed to drive AI innovation, while delivering the efficiency required to support its broader adoption. As part of the SoftBank Group, Graphcore is a member of an elite family of companies responsible for some of the world’s most transformative technologies. We are opening a new AI Engineering Campus in Austin, which will play a central role in Graphcore's work building the future of AI computing. We are looking for a Principal Firmware Design Engineer with strong experience in the Zephyr RTOS to design, develop, and maintain embedded software across server and rack-scale platforms, primarily targeted for hyperscale data center environments. The ideal candidate has deep knowledge of real-time embedded systems, SoC architectures, low-level drivers, and modern firmware development workflows. You will work closely with hardware, software, and product teams to deliver high-reliability firmware on resource-constrained platforms. RESPONSIBILITIES * Architecture, design, development, and deployment of Zephyr-based firmware for hyperscale server and rack management platforms. This includes kernel configuration, board bring-up, and subsystem integration. * Develop and maintain device drivers, subsystems, and middleware layers for sensors, connectivity, power management, storage, and peripherals. * Design and implement robust and scalable firmware interfaces for telemetry, power/thermal controls, remote manageability, and firmware update infrastructure. * Perform board configuration (DTS, Kconfig, build system) and debug low-level issues. * Collaborate with hardware teams and ODM partners through all phases of the design and development lifecycle. This includes schematic reviews, validation of interfaces, and supporting board bring-up and hardware validation. * Implement secure boot, firmware update mechanisms (MCUboot, DFU), and over-the-air (OTA) functionality when required. * Develop automated unit tests, integration tests, and hardware-in-the-loop testing using Zephyr’s testing frameworks (Twister, ztest). * Guide and support integration of firmware into CI/CD pipelines, including automated builds, regression testing, static analysis, and deployment workflows. * Partner with hardware, BMC/RMC, security, systems, and validation teams to drive alignment across the entire platform stack. * Debug complex hardware/firmware/system issues in lab and production environments. Provide debugging and root-cause analysis using tools such as JTAG/SWD, logic analyzers, and Zephyr tracing/logging systems. REQUIREMENTS * Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related discipline. * 5+ years of hands-on experience in firmware development * Hands-on experience with Zephyr RTOS, including device tree, Kconfig, board configuration, and driver development. * Experience with ARM Cortex-M or similar MCU architectures. * Solid understanding of SPI, I²C, UART, CanBus, PWM, GPIO, interrupts, DMA, and other low-level interfaces. * Familiarity with version control (Git), CI/CD workflows, and code-review practices. * Strong debugging abilities with embedded hardware and software tools. * Experience with code static analysis tools and vulnerability scanners. * Experience with system-level debug tools such as logic analyzers, JTAG, and GDB. DIFFERENTIATORS * Experience contributing to open-source RTOS projects, ideally Zephyr. * Background in networking stacks supported by Zephyr. * Knowledge of secure firmware architectures, trusted execution environments, or cryptography libraries used in embedded systems. * Experience with MCUboot, OTA pipelines, or secure firmware provisioning. * Proficiency with Python for automation, tooling, or testing. We welcome people of different backgrounds and experiences and are committed to building an inclusive work environment that makes Graphcore a great home for everyone. We are an equal opportunity employer and want to build a work environment where everyone is happy, productive and respectful so they can do their best work. If you have a disability or additional need that requires accommodation, just let us know. USA Benefits In addition to a competitive salary, Graphcore offers flexible working and a comprehensive benefits package designed to support your health, wellbeing and financial future. Our benefits include medical, dental and vision coverage, Flexible Spending Accounts (FSAs), Health Savings Accounts (HSAs), disability and life insurance, a 401(k) retirement plan, commuter benefits, wellness services and an Employee Assistance Programme (EAP). We welcome people of different backgrounds and experiences; we're committed to building an inclusive work environment that makes Graphcore a great home for everyone. We offer an equal opportunity process and understand that there are visible and invisible differences in all of us. We can provide a flexible approach to interview and encourage you to chat to us if you require any reasonable adjustments.
About us Graphcore is one of the world’s leading innovators in Artificial Intelligence compute. It is developing hardware, software and systems infrastructure that will unlock the next generation of AI breakthroughs and power the widespread adoption of AI solutions across every industry. As part of the SoftBank Group, Graphcore is a member of an elite family of companies responsible for some of the world’s most transformative technologies. Together, they share a bold vision: to enable Artificial Super Intelligence and ensure its benefits are accessible to everyone. Graphcore’s teams are drawn from diverse backgrounds and bring a broad range of skills and perspectives. A melting pot of AI research specialists, silicon designers, software engineers and systems architects, Graphcore enjoys a culture of continuous learning and constant innovation. Job Summary Reporting to senior leadership within Architecture and Validation, the Power and Performance Validation Lead will drive validation strategy and execution for advanced AI compute silicon and systems. The role is responsible for leading power, thermal and performance validation activities across pre-silicon and post-silicon environments to ensure products meet efficiency, reliability and scalability expectations. This role combines deep technical expertise with people leadership responsibilities, including team development, prioritisation, mentoring and delivery coordination across multiple projects and stakeholders. The Team The Power and Performance Validation team sits within the Architecture and Validation organisation and is responsible for validating the performance, efficiency and thermal behaviour of Graphcore silicon and systems. The team supports the full product lifecycle, from early architectural modelling through to first silicon bring-up, characterization and production readiness. Engineers work closely with cross-functional teams globally to debug complex issues, optimize workloads and continuously improve validation infrastructure and methodologies. Responsibilities and Duties * Define and lead validation strategies for power, thermal and performance characterization of AI compute silicon and platforms * Lead, mentor and support a team of validation engineers, providing technical guidance, coaching and career development * Drive planning, prioritisation and execution of validation activities across multiple projects and milestones * Develop comprehensive validation plans covering functional, stress, workload and corner-case scenarios * Lead post-silicon bring-up and characterization activities for power and performance validation * Drive validation of CPU, memory, interconnect and high-speed I/O subsystems under complex workload conditions * Develop scalable automation frameworks, regression infrastructure and reporting tools using Python * Design and execute benchmark workloads, parameter sweeps and performance experiments to identify optimization opportunities * Collaborate with architecture, RTL, firmware, software and systems teams to debug and resolve complex technical issues * Define validation metrics, pass/fail criteria and reporting methodologies to ensure repeatable and high-quality analysis * Guide development of custom workload generators and micro-benchmarks where required * Analyse power, thermal and performance data to identify bottlenecks and recommend improvements * Contribute to continuous improvement of validation processes, tooling and engineering practices * Communicate technical findings, project status, risks and recommendations clearly to stakeholders and engineering leadership * Support hiring activities, onboarding and team growth initiatives Candidate Profile Essential: * Strong experience in power and performance validation, silicon characterization or system performance engineering * Experience leading or managing engineering teams within a technical environment * Deep understanding of modern SoC architecture, including CPU, memory, interconnect and high-speed I/O technologies * Strong Linux systems knowledge and low-level performance analysis experience * Strong Python programming skills for automation, orchestration and data analysis * Experience with benchmarking and profiling tools such as stress-ng, fio, perf, iperf or equivalent technologies * Experience debugging complex hardware and software interactions * Ability to define structured validation methodologies, workload models and test strategies * Strong analytical skills with the ability to interpret large datasets and identify system bottlenecks * Strong communication, stakeholder management and cross-functional collaboration skills * Ability to lead complex technical initiatives across geographically distributed teams Desirable * Experience with AI accelerator, GPU or high-performance compute architectures * Experience with pre-silicon modelling or simulation environments * Knowledge of power management technologies and silicon characterization methodologies * Programming experience in C/C++ for low-level system or benchmark development * Familiarity with hardware instrumentation and telemetry systems * Experience working with high core-count or large-scale compute systems * Experience scaling or building technical engineering teams